From 6368c4fb387b0a43d4e927ce41d24db8b7cbcc73 Mon Sep 17 00:00:00 2001
From: Changyuan Lyu <changyuanl@google.com>
Date: Sun, 16 Jun 2024 16:05:59 -0700
Subject: [PATCH] feat: add definitions for aarch64 registers

Signed-off-by: Changyuan Lyu <changyuanl@google.com>
---
 alioth/src/arch/aarch64/aarch64.rs | 15 +++++++
 alioth/src/arch/aarch64/reg.rs     | 64 ++++++++++++++++++++++++++++++
 alioth/src/arch/arch.rs            |  6 +++
 3 files changed, 85 insertions(+)
 create mode 100644 alioth/src/arch/aarch64/aarch64.rs
 create mode 100644 alioth/src/arch/aarch64/reg.rs

diff --git a/alioth/src/arch/aarch64/aarch64.rs b/alioth/src/arch/aarch64/aarch64.rs
new file mode 100644
index 0000000..6206b24
--- /dev/null
+++ b/alioth/src/arch/aarch64/aarch64.rs
@@ -0,0 +1,15 @@
+// Copyright 2024 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     https://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+pub mod reg;
diff --git a/alioth/src/arch/aarch64/reg.rs b/alioth/src/arch/aarch64/reg.rs
new file mode 100644
index 0000000..27263b7
--- /dev/null
+++ b/alioth/src/arch/aarch64/reg.rs
@@ -0,0 +1,64 @@
+// Copyright 2024 Google LLC
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//
+//     https://www.apache.org/licenses/LICENSE-2.0
+//
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+
+use crate::c_enum;
+
+#[derive(Debug, Copy, Clone, PartialEq, Eq)]
+pub enum Reg {
+    X0,
+    X1,
+    X2,
+    X3,
+    X4,
+    X5,
+    X6,
+    X7,
+    X8,
+    X9,
+    X10,
+    X11,
+    X12,
+    X13,
+    X14,
+    X15,
+    X16,
+    X17,
+    X18,
+    X19,
+    X20,
+    X21,
+    X22,
+    X23,
+    X24,
+    X25,
+    X26,
+    X27,
+    X28,
+    X29,
+    X30,
+    Sp,
+    Pc,
+    Pstate,
+}
+
+pub const fn encode(op0: u32, op1: u32, crn: u32, crm: u32, op2: u32) -> u32 {
+    (op0 << 19) | (op1 << 16) | (crn << 12) | (crm << 8) | (op2 << 5)
+}
+
+c_enum! {
+    pub struct SReg(u32);
+    {
+        MPIDR_EL1 = encode(3, 0, 0, 0, 5);
+    }
+}
diff --git a/alioth/src/arch/arch.rs b/alioth/src/arch/arch.rs
index d03872b..478e926 100644
--- a/alioth/src/arch/arch.rs
+++ b/alioth/src/arch/arch.rs
@@ -12,8 +12,14 @@
 // See the License for the specific language governing permissions and
 // limitations under the License.
 
+#[cfg(target_arch = "aarch64")]
+#[path = "aarch64/aarch64.rs"]
+mod aarch64;
 #[cfg(target_arch = "x86_64")]
 #[path = "x86_64/x86_64.rs"]
 mod x86_64;
+
+#[cfg(target_arch = "aarch64")]
+pub use aarch64::*;
 #[cfg(target_arch = "x86_64")]
 pub use x86_64::*;