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pl030: Add simple tests
This CL justs adds two very simple tests to improve overall test coverage. Not sure what the best practices would be for mocking out the system time, so I have skipped that functionality for now. BUG=b:171750410 TEST=No change in functionality, just an added test. Change-Id: I7a4e99c9d11203c5569ff28d2a5477bf8fd1b3a7 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/2500948 Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Reviewed-by: Zach Reizner <zachr@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Commit-Queue: Dennis Kempin <denniskempin@google.com>
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1 changed files with 32 additions and 0 deletions
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@ -143,3 +143,35 @@ impl BusDevice for Pl030 {
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data[3] = (reg_content >> 24) as u8;
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}
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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#[test]
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fn test_interrupt_status_register() {
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let event = Event::new().unwrap();
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let mut device = Pl030::new(event.try_clone().unwrap());
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let mut register = [0, 0, 0, 0];
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// set interrupt
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device.write(RTCEOI, &[1, 0, 0, 0]);
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device.read(RTCSTAT, &mut register);
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assert_eq!(register, [1, 0, 0, 0]);
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assert_eq!(event.read().unwrap(), 1);
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// clear interrupt
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device.write(RTCEOI, &[0, 0, 0, 0]);
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device.read(RTCSTAT, &mut register);
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assert_eq!(register, [0, 0, 0, 0]);
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}
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#[test]
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fn test_match_register() {
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let mut device = Pl030::new(Event::new().unwrap());
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let mut register = [0, 0, 0, 0];
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device.write(RTCMR, &[1, 2, 3, 4]);
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device.read(RTCMR, &mut register);
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assert_eq!(register, [4, 3, 2, 1]);
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}
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}
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