mirrors/crosvm
1
0
Fork 0
mirror of https://chromium.googlesource.com/crosvm/crosvm synced 2024-11-25 05:03:05 +00:00
Code Issues Projects Releases Packages Wiki Activity Actions

x86_64: Enlarge pci low mmio size

Browse source 
When pci_low_mmio allocates non-prefetchable bridge window for virtual
pcie root ports on brya-manatee, out of space error happens on one
virtual pcie root port.

Currently 756MB mmio is reaserved for pci low mmio and nearly 650MB could
be allocated, but byra has three pcie root ports, each pcie root port
reserve 194MB non-prefetchable bridge, so CrOS in brya-manatee needs at
least 194x3=582MB pci low mmio, consider bar alignment, 756MB isn't
enough for brya-manatee and the above error happen, so this commit
increate it to 1G.

BUG=b:185084350
TEST=boot brya-manatee and check bridge window allocation on each
virtual pcie root port.

Change-Id: I837f7dad459f624437ce6334719dfe337dea1d75
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3535683
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This commit is contained in:
Xiong Zhang 2022-03-18 09:26:20 +08:00 committed by Commit Bot
parent 5501f1c940
commit c17d215804
1 changed files with 1 additions and 1 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

2
x86_64/src/lib.rs
View file

@ -196,7 +196,7 @@ const GB: u64 = 1 << 30;
const BOOT_STACK_POINTER: u64 = 0x8000;
// Make sure it align to 256MB for MTRR convenient
const MEM_32BIT_GAP_SIZE: u64 = 768 * MB;
const MEM_32BIT_GAP_SIZE: u64 = 1024 * MB;
const START_OF_RAM_32BITS: u64 = 0;
const FIRST_ADDR_PAST_32BITS: u64 = 1 << 32;
// Reserved memory for nand_bios/LAPIC/IOAPIC/HPET/.....