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device: acpi: Fix SCI IRQ setup to be level-triggered IRQ
KVM irqchip treats differently edge vs level triggered IRQ. By registering SCI without resample event, we might see unexpected misbehavior. Since SCI is level-triggered IRQ pass corresponding resample event even though we don't utilize it right now. Also store the new event as part of ACPIPMResource for future usage. BUG=b:205072342 TEST=inject GPE and inspect /sys/firmware/acpi/interrupts/ Change-Id: Ib27f98bbef56ea4ca18da5bf4428bf45bf115882 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3439888 Reviewed-by: Micah Morton <mortonm@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Dmitry Torokhov <dtor@chromium.org> Commit-Queue: Grzegorz Jaszczyk <jaszczyk@google.com>
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2 changed files with 12 additions and 3 deletions
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@ -11,6 +11,7 @@ use vm_control::PmResource;
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#[allow(dead_code)]
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pub struct ACPIPMResource {
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sci_evt: Event,
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sci_evt_resample: Event,
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suspend_evt: Event,
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exit_evt: Event,
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pm1_status: u16,
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@ -23,9 +24,15 @@ pub struct ACPIPMResource {
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impl ACPIPMResource {
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/// Constructs ACPI Power Management Resouce.
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#[allow(dead_code)]
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pub fn new(sci_evt: Event, suspend_evt: Event, exit_evt: Event) -> ACPIPMResource {
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pub fn new(
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sci_evt: Event,
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sci_evt_resample: Event,
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suspend_evt: Event,
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exit_evt: Event,
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) -> ACPIPMResource {
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ACPIPMResource {
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sci_evt,
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sci_evt_resample,
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suspend_evt,
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exit_evt,
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pm1_status: 0,
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@ -1295,10 +1295,12 @@ impl X8664arch {
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pcie_vcfg.to_aml_bytes(&mut amls);
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let pm_sci_evt = Event::new().map_err(Error::CreateEvent)?;
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let pm_sci_evt_resample = Event::new().map_err(Error::CreateEvent)?;
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irq_chip
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.register_irq_event(sci_irq, &pm_sci_evt, None)
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.register_irq_event(sci_irq, &pm_sci_evt, Some(&pm_sci_evt_resample))
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.map_err(Error::RegisterIrqfd)?;
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let pmresource = devices::ACPIPMResource::new(pm_sci_evt, suspend_evt, exit_evt);
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let pmresource =
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devices::ACPIPMResource::new(pm_sci_evt, pm_sci_evt_resample, suspend_evt, exit_evt);
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pmresource.to_aml_bytes(&mut amls);
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let mut crs_entries: Vec<Box<dyn Aml>> = vec![
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