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clippy: fix devices crate

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Fixes clippy failures and enables clippy checks on the crate.

BUG=b:192373803
TEST=./tools/presubmit

Change-Id: I9022d40e997f94c03d3f936734116e3ea0505022
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3441348
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Noah Gold <nkgold@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
This commit is contained in:
Dennis Kempin 2022-02-04 15:05:15 -08:00 committed by Commit Bot
parent 7a543caa2e
commit f881af3c1f
20 changed files with 138 additions and 154 deletions
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11
.cargo/config.toml
View file

@ -13,13 +13,11 @@ rustflags = [
"-Aclippy::blocks_in_if_conditions",
"-Aclippy::missing_safety_doc", # 26 errors
# False positives affecting WlVfd @ `devices/src/virtio/wl.rs`.
# Bug: https://github.com/rust-lang/rust-clippy/issues/6312
"-Aclippy::field_reassign_with_default",
# We don't care about these lints. Okay to remain suppressed globally.
"-Aclippy::bool_assert_comparison",
"-Aclippy::cast_lossless",
"-Aclippy::cognitive_complexity",
"-Aclippy::collapsible_if",
"-Aclippy::enum_variant_names",
"-Aclippy::identity_op",
"-Aclippy::len_without_is_empty",
@ -29,7 +27,9 @@ rustflags = [
"-Aclippy::module_inception",
"-Aclippy::needless_bool",
"-Aclippy::new_without_default",
"-Aclippy::new-ret-no-self",
"-Aclippy::or_fun_call",
"-Aclippy::result-unit-err",
"-Aclippy::should_implement_trait",
"-Aclippy::single_char_pattern",
"-Aclippy::too_many_arguments",
@ -38,9 +38,6 @@ rustflags = [
"-Aclippy::unreadable_literal",
"-Aclippy::useless_let_if_seq",
"-Aclippy::useless_transmute",
"-Aclippy::new-ret-no-self",
"-Aclippy::result-unit-err",
"-Aclippy::collapsible_if",
]
[target.armv7-unknown-linux-gnueabihf]

14
devices/src/bus.rs
View file

@ -444,7 +444,7 @@ mod tests {
assert!(bus.insert(dummy.clone(), 0x0, 0x20).is_err());
assert!(bus.insert(dummy.clone(), 0x20, 0x05).is_ok());
assert!(bus.insert(dummy.clone(), 0x25, 0x05).is_ok());
assert!(bus.insert(dummy.clone(), 0x0, 0x10).is_ok());
assert!(bus.insert(dummy, 0x0, 0x10).is_ok());
}
#[test]
@ -461,14 +461,14 @@ mod tests {
assert!(bus.insert(dummy.clone(), 0x0, 0x20).is_err());
assert!(bus.insert(dummy.clone(), 0x20, 0x05).is_ok());
assert!(bus.insert(dummy.clone(), 0x25, 0x05).is_ok());
assert!(bus.insert(dummy.clone(), 0x0, 0x10).is_ok());
assert!(bus.insert(dummy, 0x0, 0x10).is_ok());
}
#[test]
fn bus_read_write() {
let bus = Bus::new();
let dummy = Arc::new(Mutex::new(DummyDevice));
assert!(bus.insert(dummy.clone(), 0x10, 0x10).is_ok());
assert!(bus.insert(dummy, 0x10, 0x10).is_ok());
assert!(bus.read(0x10, &mut [0, 0, 0, 0]));
assert!(bus.write(0x10, &[0, 0, 0, 0]));
assert!(bus.read(0x11, &mut [0, 0, 0, 0]));
@ -476,9 +476,9 @@ mod tests {
assert!(bus.read(0x16, &mut [0, 0, 0, 0]));
assert!(bus.write(0x16, &[0, 0, 0, 0]));
assert!(!bus.read(0x20, &mut [0, 0, 0, 0]));
assert!(!bus.write(0x20, &mut [0, 0, 0, 0]));
assert!(!bus.write(0x20, &[0, 0, 0, 0]));
assert!(!bus.read(0x06, &mut [0, 0, 0, 0]));
assert!(!bus.write(0x06, &mut [0, 0, 0, 0]));
assert!(!bus.write(0x06, &[0, 0, 0, 0]));
}
#[test]
@ -487,7 +487,7 @@ mod tests {
let dummy = Arc::new(Mutex::new(ConstantDevice {
uses_full_addr: false,
}));
assert!(bus.insert(dummy.clone(), 0x10, 0x10).is_ok());
assert!(bus.insert(dummy, 0x10, 0x10).is_ok());
let mut values = [0, 1, 2, 3];
assert!(bus.read(0x10, &mut values));
@ -504,7 +504,7 @@ mod tests {
let dummy = Arc::new(Mutex::new(ConstantDevice {
uses_full_addr: true,
}));
assert!(bus.insert(dummy.clone(), 0x10, 0x10).is_ok());
assert!(bus.insert(dummy, 0x10, 0x10).is_ok());
let mut values = [0u8; 4];
assert!(bus.read(0x10, &mut values));

16
devices/src/irqchip/pic.rs
View file

@ -541,15 +541,17 @@ mod tests {
// The PIC is added to the io_bus in three locations, so the offset depends on which
// address range the address is in. The PIC implementation currently does not use the
// offset, but we're setting it accurately here in case it does in the future.
let offset = match address {
x if x >= PIC_PRIMARY && x < PIC_PRIMARY + 0x2 => address - PIC_PRIMARY,
x if x >= PIC_SECONDARY && x < PIC_SECONDARY + 0x2 => address - PIC_SECONDARY,
x if x >= PIC_PRIMARY_ELCR && x < PIC_PRIMARY_ELCR + 0x2 => address - PIC_PRIMARY_ELCR,
_ => panic!("invalid PIC address: {:#x}", address),
let base_address = if (PIC_PRIMARY..PIC_PRIMARY + 0x2).contains(&address) {
PIC_PRIMARY
} else if (PIC_SECONDARY..PIC_SECONDARY + 0x2).contains(&address) {
PIC_SECONDARY
} else if (PIC_PRIMARY_ELCR..PIC_PRIMARY_ELCR + 0x2).contains(&address) {
PIC_PRIMARY_ELCR
} else {
panic!("invalid PIC address: {:#x}", address);
};
BusAccessInfo {
offset,
offset: address - base_address,
address,
id: 0,
}

7
devices/src/pci/ac97_bus_master.rs
View file

@ -1078,7 +1078,7 @@ mod test {
mem.write_obj_at_addr(GUEST_ADDR_BASE + FRAGMENT_SIZE as u32, pointer_addr)
.expect("Writing guest memory failed.");
};
mem.write_obj_at_addr(IOC_MASK | (FRAGMENT_SIZE as u32) / 2, control_addr)
mem.write_obj_at_addr(IOC_MASK | ((FRAGMENT_SIZE as u32) / 2), control_addr)
.expect("Writing guest memory failed.");
}
@ -1216,8 +1216,7 @@ mod test {
GS_MINT,
),
_ => {
assert!(false, "Invalid Ac97Function.");
(0, 0, 0, 0, 0, 0, 0)
panic!("Invalid Ac97Function.");
}
};
@ -1231,7 +1230,7 @@ mod test {
let control_addr = GuestAddress(GUEST_ADDR_BASE as u64 + i as u64 * 8 + 4);
mem.write_obj_at_addr(GUEST_ADDR_BASE + FRAGMENT_SIZE as u32, pointer_addr)
.expect("Writing guest memory failed.");
mem.write_obj_at_addr(IOC_MASK | (FRAGMENT_SIZE as u32) / 2, control_addr)
mem.write_obj_at_addr(IOC_MASK | ((FRAGMENT_SIZE as u32) / 2), control_addr)
.expect("Writing guest memory failed.");
}

12
devices/src/pci/pci_configuration.rs
View file

@ -911,7 +911,7 @@ mod tests {
PciBarRegionType::Memory64BitRegion,
PciBarPrefetchable::NotPrefetchable,
)
.set_address(0x01234567_89ABCDE0),
.set_address(0x0123_4567_89AB_CDE0),
)
.expect("add_pci_bar failed");
@ -919,7 +919,7 @@ mod tests {
cfg.get_bar_type(0),
Some(PciBarRegionType::Memory64BitRegion)
);
assert_eq!(cfg.get_bar_addr(0), 0x01234567_89ABCDE0);
assert_eq!(cfg.get_bar_addr(0), 0x0123_4567_89AB_CDE0);
assert_eq!(cfg.writable_bits[BAR0_REG + 1], 0xFFFFFFFF);
assert_eq!(cfg.writable_bits[BAR0_REG + 0], 0xFFFFFFF0);
@ -927,7 +927,7 @@ mod tests {
assert_eq!(
bar_iter.next(),
Some(PciBarConfiguration {
addr: 0x01234567_89ABCDE0,
addr: 0x0123_4567_89AB_CDE0,
size: 0x10,
bar_idx: 0,
region_type: PciBarRegionType::Memory64BitRegion,
@ -1048,7 +1048,7 @@ mod tests {
PciBarRegionType::Memory64BitRegion,
PciBarPrefetchable::NotPrefetchable,
)
.set_address(0x01234567_89ABCDE0),
.set_address(0x0123_4567_89AB_CDE0),
)
.expect("add_pci_bar failed");
@ -1081,7 +1081,7 @@ mod tests {
assert_eq!(
bar_iter.next(),
Some(PciBarConfiguration {
addr: 0x01234567_89ABCDE0,
addr: 0x0123_4567_89AB_CDE0,
size: 0x10,
bar_idx: 0,
region_type: PciBarRegionType::Memory64BitRegion,
@ -1118,7 +1118,7 @@ mod tests {
assert_eq!(
bar_iter.next(),
Some(PciBarConfiguration {
addr: 0xFFEEDDCC_BBAA9980,
addr: 0xFFEE_DDCC_BBAA_9980,
size: 0x10,
bar_idx: 0,
region_type: PciBarRegionType::Memory64BitRegion,

2
devices/src/pit.rs
View file

@ -1262,7 +1262,7 @@ mod tests {
CommandAccess::CommandRWBoth,
);
advance_by_ticks(&mut data, (3 * FREQUENCY_HZ).into());
advance_by_ticks(&mut data, 3 * FREQUENCY_HZ);
read_counter(&mut data.pit, 0, 0, CommandAccess::CommandRWBoth);
}

23
devices/src/serial.rs
View file

@ -427,13 +427,10 @@ mod tests {
Vec::new(),
);
serial.write(serial_bus_address(DATA), &['a' as u8]);
serial.write(serial_bus_address(DATA), &['b' as u8]);
serial.write(serial_bus_address(DATA), &['c' as u8]);
assert_eq!(
serial_out.buf.lock().as_slice(),
&['a' as u8, 'b' as u8, 'c' as u8]
);
serial.write(serial_bus_address(DATA), &[b'a']);
serial.write(serial_bus_address(DATA), &[b'b']);
serial.write(serial_bus_address(DATA), &[b'c']);
assert_eq!(serial_out.buf.lock().as_slice(), &[b'a', b'b', b'c']);
}
#[test]
@ -445,22 +442,20 @@ mod tests {
ProtectionType::Unprotected,
intr_evt.try_clone().unwrap(),
None,
Some(Box::new(serial_out.clone())),
Some(Box::new(serial_out)),
Vec::new(),
);
serial.write(serial_bus_address(IER), &[IER_RECV_BIT]);
serial
.queue_input_bytes(&['a' as u8, 'b' as u8, 'c' as u8])
.unwrap();
serial.queue_input_bytes(&[b'a', b'b', b'c']).unwrap();
assert_eq!(intr_evt.read(), Ok(1));
let mut data = [0u8; 1];
serial.read(serial_bus_address(DATA), &mut data[..]);
assert_eq!(data[0], 'a' as u8);
assert_eq!(data[0], b'a');
serial.read(serial_bus_address(DATA), &mut data[..]);
assert_eq!(data[0], 'b' as u8);
assert_eq!(data[0], b'b');
serial.read(serial_bus_address(DATA), &mut data[..]);
assert_eq!(data[0], 'c' as u8);
assert_eq!(data[0], b'c');
}
}

34
devices/src/usb/xhci/event_ring.rs
View file

@ -211,8 +211,8 @@ mod test {
#[test]
fn test_uninited() {
let gm = GuestMemory::new(&vec![(GuestAddress(0), 0x1000)]).unwrap();
let mut er = EventRing::new(gm.clone());
let gm = GuestMemory::new(&[(GuestAddress(0), 0x1000)]).unwrap();
let mut er = EventRing::new(gm);
let trb = Trb::new();
match er.add_event(trb).err().unwrap() {
Error::Uninitialized => {}
@ -225,7 +225,7 @@ mod test {
#[test]
fn test_event_ring() {
let trb_size = size_of::<Trb>() as u64;
let gm = GuestMemory::new(&vec![(GuestAddress(0), 0x1000)]).unwrap();
let gm = GuestMemory::new(&[(GuestAddress(0), 0x1000)]).unwrap();
let mut er = EventRing::new(gm.clone());
let mut st_entries = [EventRingSegmentTableEntry::new(); 3];
st_entries[0].set_ring_segment_base_address(0x100);
@ -257,7 +257,7 @@ mod test {
trb.set_control(1);
assert_eq!(er.is_empty(), true);
assert_eq!(er.is_full().unwrap(), false);
assert_eq!(er.add_event(trb.clone()).unwrap(), ());
assert!(er.add_event(trb).is_ok());
assert_eq!(er.is_full().unwrap(), false);
assert_eq!(er.is_empty(), false);
let t: Trb = gm.read_obj_from_addr(GuestAddress(0x100)).unwrap();
@ -265,7 +265,7 @@ mod test {
assert_eq!(t.get_cycle(), true);
trb.set_control(2);
assert_eq!(er.add_event(trb.clone()).unwrap(), ());
assert!(er.add_event(trb).is_ok());
assert_eq!(er.is_full().unwrap(), false);
assert_eq!(er.is_empty(), false);
let t: Trb = gm
@ -275,7 +275,7 @@ mod test {
assert_eq!(t.get_cycle(), true);
trb.set_control(3);
assert_eq!(er.add_event(trb.clone()).unwrap(), ());
assert!(er.add_event(trb).is_ok());
assert_eq!(er.is_full().unwrap(), false);
assert_eq!(er.is_empty(), false);
let t: Trb = gm
@ -286,7 +286,7 @@ mod test {
// Fill second table.
trb.set_control(4);
assert_eq!(er.add_event(trb.clone()).unwrap(), ());
assert!(er.add_event(trb).is_ok());
assert_eq!(er.is_full().unwrap(), false);
assert_eq!(er.is_empty(), false);
let t: Trb = gm.read_obj_from_addr(GuestAddress(0x200)).unwrap();
@ -294,7 +294,7 @@ mod test {
assert_eq!(t.get_cycle(), true);
trb.set_control(5);
assert_eq!(er.add_event(trb.clone()).unwrap(), ());
assert!(er.add_event(trb).is_ok());
assert_eq!(er.is_full().unwrap(), false);
assert_eq!(er.is_empty(), false);
let t: Trb = gm
@ -304,7 +304,7 @@ mod test {
assert_eq!(t.get_cycle(), true);
trb.set_control(6);
assert_eq!(er.add_event(trb.clone()).unwrap(), ());
assert!(er.add_event(trb).is_ok());
assert_eq!(er.is_full().unwrap(), false);
assert_eq!(er.is_empty(), false);
let t: Trb = gm
@ -315,7 +315,7 @@ mod test {
// Fill third table.
trb.set_control(7);
assert_eq!(er.add_event(trb.clone()).unwrap(), ());
assert!(er.add_event(trb).is_ok());
assert_eq!(er.is_full().unwrap(), false);
assert_eq!(er.is_empty(), false);
let t: Trb = gm.read_obj_from_addr(GuestAddress(0x300)).unwrap();
@ -323,7 +323,7 @@ mod test {
assert_eq!(t.get_cycle(), true);
trb.set_control(8);
assert_eq!(er.add_event(trb.clone()).unwrap(), ());
assert!(er.add_event(trb).is_ok());
// There is only one last trb. Considered full.
assert_eq!(er.is_full().unwrap(), true);
assert_eq!(er.is_empty(), false);
@ -334,7 +334,7 @@ mod test {
assert_eq!(t.get_cycle(), true);
// Add the last trb will result in error.
match er.add_event(trb.clone()) {
match er.add_event(trb) {
Err(Error::EventRingFull) => {}
_ => panic!("er should be full"),
};
@ -346,7 +346,7 @@ mod test {
// Fill the last trb of the third table.
trb.set_control(9);
assert_eq!(er.add_event(trb.clone()).unwrap(), ());
assert!(er.add_event(trb).is_ok());
// There is only one last trb. Considered full.
assert_eq!(er.is_full().unwrap(), true);
assert_eq!(er.is_empty(), false);
@ -357,7 +357,7 @@ mod test {
assert_eq!(t.get_cycle(), true);
// Add the last trb will result in error.
match er.add_event(trb.clone()) {
match er.add_event(trb) {
Err(Error::EventRingFull) => {}
_ => panic!("er should be full"),
};
@ -369,7 +369,7 @@ mod test {
// Fill first table again.
trb.set_control(10);
assert_eq!(er.add_event(trb.clone()).unwrap(), ());
assert!(er.add_event(trb).is_ok());
assert_eq!(er.is_full().unwrap(), false);
assert_eq!(er.is_empty(), false);
let t: Trb = gm.read_obj_from_addr(GuestAddress(0x100)).unwrap();
@ -378,7 +378,7 @@ mod test {
assert_eq!(t.get_cycle(), false);
trb.set_control(11);
assert_eq!(er.add_event(trb.clone()).unwrap(), ());
assert!(er.add_event(trb).is_ok());
assert_eq!(er.is_full().unwrap(), false);
assert_eq!(er.is_empty(), false);
let t: Trb = gm
@ -388,7 +388,7 @@ mod test {
assert_eq!(t.get_cycle(), false);
trb.set_control(12);
assert_eq!(er.add_event(trb.clone()).unwrap(), ());
assert!(er.add_event(trb).is_ok());
assert_eq!(er.is_full().unwrap(), false);
assert_eq!(er.is_empty(), false);
let t: Trb = gm

21
devices/src/usb/xhci/ring_buffer.rs
View file

@ -148,7 +148,7 @@ mod test {
#[test]
fn ring_test_dequeue() {
let trb_size = size_of::<Trb>() as u64;
let gm = GuestMemory::new(&vec![(GuestAddress(0), 0x1000)]).unwrap();
let gm = GuestMemory::new(&[(GuestAddress(0), 0x1000)]).unwrap();
let mut transfer_ring = RingBuffer::new(String::new(), gm.clone());
// Structure of ring buffer:
@ -160,8 +160,7 @@ mod test {
trb.set_trb_type(TrbType::Normal);
trb.set_data_buffer(1);
trb.set_chain(true);
gm.write_obj_at_addr(trb.clone(), GuestAddress(0x100))
.unwrap();
gm.write_obj_at_addr(trb, GuestAddress(0x100)).unwrap();
trb.set_data_buffer(2);
gm.write_obj_at_addr(trb, GuestAddress(0x100 + trb_size))
@ -227,15 +226,14 @@ mod test {
#[test]
fn transfer_ring_test_dequeue_failure() {
let trb_size = size_of::<Trb>() as u64;
let gm = GuestMemory::new(&vec![(GuestAddress(0), 0x1000)]).unwrap();
let gm = GuestMemory::new(&[(GuestAddress(0), 0x1000)]).unwrap();
let mut transfer_ring = RingBuffer::new(String::new(), gm.clone());
let mut trb = NormalTrb::new();
trb.set_trb_type(TrbType::Normal);
trb.set_data_buffer(1);
trb.set_chain(true);
gm.write_obj_at_addr(trb.clone(), GuestAddress(0x100))
.unwrap();
gm.write_obj_at_addr(trb, GuestAddress(0x100)).unwrap();
trb.set_data_buffer(2);
gm.write_obj_at_addr(trb, GuestAddress(0x100 + trb_size))
@ -262,7 +260,7 @@ mod test {
#[test]
fn ring_test_toggle_cycle() {
let trb_size = size_of::<Trb>() as u64;
let gm = GuestMemory::new(&vec![(GuestAddress(0), 0x1000)]).unwrap();
let gm = GuestMemory::new(&[(GuestAddress(0), 0x1000)]).unwrap();
let mut transfer_ring = RingBuffer::new(String::new(), gm.clone());
let mut trb = NormalTrb::new();
@ -270,8 +268,7 @@ mod test {
trb.set_data_buffer(1);
trb.set_chain(false);
trb.set_cycle(false);
gm.write_obj_at_addr(trb.clone(), GuestAddress(0x100))
.unwrap();
gm.write_obj_at_addr(trb, GuestAddress(0x100)).unwrap();
let mut ltrb = LinkTrb::new();
ltrb.set_trb_type(TrbType::Link);
@ -302,8 +299,7 @@ mod test {
trb.set_trb_type(TrbType::Normal);
trb.set_data_buffer(2);
trb.set_cycle(true); // Link TRB toggled the cycle.
gm.write_obj_at_addr(trb.clone(), GuestAddress(0x100))
.unwrap();
gm.write_obj_at_addr(trb, GuestAddress(0x100)).unwrap();
// Read new transfer descriptor.
let descriptor = transfer_ring
@ -330,8 +326,7 @@ mod test {
trb.set_trb_type(TrbType::Normal);
trb.set_data_buffer(3);
trb.set_cycle(false); // Link TRB toggled the cycle.
gm.write_obj_at_addr(trb.clone(), GuestAddress(0x100))
.unwrap();
gm.write_obj_at_addr(trb, GuestAddress(0x100)).unwrap();
// Read new transfer descriptor.
let descriptor = transfer_ring

5
devices/src/usb/xhci/ring_buffer_controller.rs
View file

@ -244,7 +244,7 @@ mod tests {
fn setup_mem() -> GuestMemory {
let trb_size = size_of::<Trb>() as u64;
let gm = GuestMemory::new(&vec![(GuestAddress(0), 0x1000)]).unwrap();
let gm = GuestMemory::new(&[(GuestAddress(0), 0x1000)]).unwrap();
// Structure of ring buffer:
// 0x100 --> 0x200 --> 0x300
@ -255,8 +255,7 @@ mod tests {
trb.set_trb_type(TrbType::Normal);
trb.set_data_buffer(1);
trb.set_chain(true);
gm.write_obj_at_addr(trb.clone(), GuestAddress(0x100))
.unwrap();
gm.write_obj_at_addr(trb, GuestAddress(0x100)).unwrap();
trb.set_data_buffer(2);
gm.write_obj_at_addr(trb, GuestAddress(0x100 + trb_size))

6
devices/src/usb/xhci/scatter_gather_buffer.rs
View file

@ -144,7 +144,7 @@ mod test {
#[test]
fn scatter_gather_buffer_test() {
let gm = GuestMemory::new(&vec![(GuestAddress(0), 0x1000)]).unwrap();
let gm = GuestMemory::new(&[(GuestAddress(0), 0x1000)]).unwrap();
let mut td = TransferDescriptor::new();
// In this td, we are going to have scatter buffer at 0x100, length 4, 0x200 length 2 and
@ -192,7 +192,7 @@ mod test {
#[test]
fn immediate_data_test() {
let gm = GuestMemory::new(&vec![(GuestAddress(0), 0x1000)]).unwrap();
let gm = GuestMemory::new(&[(GuestAddress(0), 0x1000)]).unwrap();
let mut td = TransferDescriptor::new();
let expected_immediate_data: [u8; 8] = [0xDE, 0xAD, 0xBE, 0xEF, 0xF0, 0x0D, 0xCA, 0xFE];
@ -207,7 +207,7 @@ mod test {
gm.write_obj_at_addr(trb, GuestAddress(0xc00)).unwrap();
let buffer = ScatterGatherBuffer::new(gm.clone(), td).unwrap();
let buffer = ScatterGatherBuffer::new(gm, td).unwrap();
let mut data_read = [0; 8];
buffer.read(&mut data_read).unwrap();

2
devices/src/virtio/balloon.rs
View file

@ -607,7 +607,7 @@ mod tests {
// Check that the memory addresses are parsed correctly by 'handle_address_chain' and passed
// to the closure.
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
memory
.write_obj_at_addr(0x10u32, GuestAddress(0x100))
.unwrap();

106
devices/src/virtio/descriptor_utils.rs
View file

@ -833,7 +833,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -848,14 +848,14 @@ mod tests {
0,
)
.expect("create_descriptor_chain failed");
let mut reader = Reader::new(memory.clone(), chain).expect("failed to create Reader");
let mut reader = Reader::new(memory, chain).expect("failed to create Reader");
assert_eq!(reader.available_bytes(), 106);
assert_eq!(reader.bytes_read(), 0);
let mut buffer = [0 as u8; 64];
if let Err(_) = reader.read_exact(&mut buffer) {
panic!("read_exact should not fail here");
}
let mut buffer = [0u8; 64];
reader
.read_exact(&mut buffer)
.expect("read_exact should not fail here");
assert_eq!(reader.available_bytes(), 42);
assert_eq!(reader.bytes_read(), 64);
@ -874,7 +874,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -889,19 +889,19 @@ mod tests {
0,
)
.expect("create_descriptor_chain failed");
let mut writer = Writer::new(memory.clone(), chain).expect("failed to create Writer");
let mut writer = Writer::new(memory, chain).expect("failed to create Writer");
assert_eq!(writer.available_bytes(), 106);
assert_eq!(writer.bytes_written(), 0);
let mut buffer = [0 as u8; 64];
if let Err(_) = writer.write_all(&mut buffer) {
panic!("write_all should not fail here");
}
let buffer = [0; 64];
writer
.write_all(&buffer)
.expect("write_all should not fail here");
assert_eq!(writer.available_bytes(), 42);
assert_eq!(writer.bytes_written(), 64);
match writer.write(&mut buffer) {
match writer.write(&buffer) {
Err(_) => panic!("write should not fail here"),
Ok(length) => assert_eq!(length, 42),
}
@ -915,7 +915,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -925,7 +925,7 @@ mod tests {
0,
)
.expect("create_descriptor_chain failed");
let mut reader = Reader::new(memory.clone(), chain).expect("failed to create Reader");
let mut reader = Reader::new(memory, chain).expect("failed to create Reader");
assert_eq!(reader.available_bytes(), 0);
assert_eq!(reader.bytes_read(), 0);
@ -940,7 +940,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -950,7 +950,7 @@ mod tests {
0,
)
.expect("create_descriptor_chain failed");
let mut writer = Writer::new(memory.clone(), chain).expect("failed to create Writer");
let mut writer = Writer::new(memory, chain).expect("failed to create Writer");
assert_eq!(writer.available_bytes(), 0);
assert_eq!(writer.bytes_written(), 0);
@ -965,7 +965,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -976,7 +976,7 @@ mod tests {
)
.expect("create_descriptor_chain failed");
let mut reader = Reader::new(memory.clone(), chain).expect("failed to create Reader");
let mut reader = Reader::new(memory, chain).expect("failed to create Reader");
// Open a file in read-only mode so writes to it to trigger an I/O error.
let mut ro_file = File::open("/dev/zero").expect("failed to open /dev/zero");
@ -995,7 +995,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -1006,7 +1006,7 @@ mod tests {
)
.expect("create_descriptor_chain failed");
let mut writer = Writer::new(memory.clone(), chain).expect("failed to create Writer");
let mut writer = Writer::new(memory, chain).expect("failed to create Writer");
let mut file = tempfile().unwrap();
@ -1025,7 +1025,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -1044,7 +1044,7 @@ mod tests {
.expect("create_descriptor_chain failed");
let mut reader =
Reader::new(memory.clone(), chain.clone()).expect("failed to create Reader");
let mut writer = Writer::new(memory.clone(), chain).expect("failed to create Writer");
let mut writer = Writer::new(memory, chain).expect("failed to create Writer");
assert_eq!(reader.bytes_read(), 0);
assert_eq!(writer.bytes_written(), 0);
@ -1074,7 +1074,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let secret: Le32 = 0x12345678.into();
@ -1089,9 +1089,9 @@ mod tests {
.expect("create_descriptor_chain failed");
let mut writer =
Writer::new(memory.clone(), chain_writer).expect("failed to create Writer");
if let Err(_) = writer.write_obj(secret) {
panic!("write_obj should not fail here");
}
writer
.write_obj(secret)
.expect("write_obj should not fail here");
// Now create new descriptor chain pointing to the same memory and try to read it.
let chain_reader = create_descriptor_chain(
@ -1102,8 +1102,7 @@ mod tests {
123,
)
.expect("create_descriptor_chain failed");
let mut reader =
Reader::new(memory.clone(), chain_reader).expect("failed to create Reader");
let mut reader = Reader::new(memory, chain_reader).expect("failed to create Reader");
match reader.read_obj::<Le32>() {
Err(_) => panic!("read_obj should not fail here"),
Ok(read_secret) => assert_eq!(read_secret, secret),
@ -1115,7 +1114,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -1126,10 +1125,9 @@ mod tests {
)
.expect("create_descriptor_chain failed");
let mut reader = Reader::new(memory.clone(), chain).expect("failed to create Reader");
let mut reader = Reader::new(memory, chain).expect("failed to create Reader");
let mut buf = Vec::with_capacity(1024);
buf.resize(1024, 0);
let mut buf = vec![0; 1024];
assert_eq!(
reader
@ -1145,7 +1143,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -1162,7 +1160,7 @@ mod tests {
0,
)
.expect("create_descriptor_chain failed");
let mut reader = Reader::new(memory.clone(), chain).expect("failed to create Reader");
let mut reader = Reader::new(memory, chain).expect("failed to create Reader");
let other = reader.split_at(32);
assert_eq!(reader.available_bytes(), 32);
@ -1174,7 +1172,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -1191,7 +1189,7 @@ mod tests {
0,
)
.expect("create_descriptor_chain failed");
let mut reader = Reader::new(memory.clone(), chain).expect("failed to create Reader");
let mut reader = Reader::new(memory, chain).expect("failed to create Reader");
let other = reader.split_at(24);
assert_eq!(reader.available_bytes(), 24);
@ -1203,7 +1201,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -1220,7 +1218,7 @@ mod tests {
0,
)
.expect("create_descriptor_chain failed");
let mut reader = Reader::new(memory.clone(), chain).expect("failed to create Reader");
let mut reader = Reader::new(memory, chain).expect("failed to create Reader");
let other = reader.split_at(128);
assert_eq!(reader.available_bytes(), 128);
@ -1232,7 +1230,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -1249,7 +1247,7 @@ mod tests {
0,
)
.expect("create_descriptor_chain failed");
let mut reader = Reader::new(memory.clone(), chain).expect("failed to create Reader");
let mut reader = Reader::new(memory, chain).expect("failed to create Reader");
let other = reader.split_at(0);
assert_eq!(reader.available_bytes(), 0);
@ -1261,7 +1259,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -1278,7 +1276,7 @@ mod tests {
0,
)
.expect("create_descriptor_chain failed");
let mut reader = Reader::new(memory.clone(), chain).expect("failed to create Reader");
let mut reader = Reader::new(memory, chain).expect("failed to create Reader");
let other = reader.split_at(256);
assert_eq!(
@ -1293,7 +1291,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -1303,7 +1301,7 @@ mod tests {
0,
)
.expect("create_descriptor_chain failed");
let mut reader = Reader::new(memory.clone(), chain).expect("failed to create Reader");
let mut reader = Reader::new(memory, chain).expect("failed to create Reader");
let mut buf = vec![0u8; 64];
assert_eq!(
@ -1317,7 +1315,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -1327,7 +1325,7 @@ mod tests {
0,
)
.expect("create_descriptor_chain failed");
let mut writer = Writer::new(memory.clone(), chain).expect("failed to create Writer");
let mut writer = Writer::new(memory, chain).expect("failed to create Writer");
let buf = vec![0xdeu8; 64];
assert_eq!(
@ -1341,7 +1339,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let vs: Vec<Le64> = vec![
0x0101010101010101.into(),
0x0202020202020202.into(),
@ -1369,7 +1367,7 @@ mod tests {
0,
)
.expect("create_descriptor_chain failed");
let mut reader = Reader::new(memory.clone(), read_chain).expect("failed to create Reader");
let mut reader = Reader::new(memory, read_chain).expect("failed to create Reader");
let vs_read = reader
.collect::<io::Result<Vec<Le64>>, _>()
.expect("failed to collect() values");
@ -1381,7 +1379,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -1402,7 +1400,7 @@ mod tests {
let Reader {
mem: _,
mut regions,
} = Reader::new(memory.clone(), chain).expect("failed to create Reader");
} = Reader::new(memory, chain).expect("failed to create Reader");
let drain = regions
.get_remaining_regions_with_count(::std::usize::MAX)
@ -1439,7 +1437,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -1500,7 +1498,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,
@ -1536,7 +1534,7 @@ mod tests {
use DescriptorType::*;
let memory_start_addr = GuestAddress(0x0);
let memory = GuestMemory::new(&vec![(memory_start_addr, 0x10000)]).unwrap();
let memory = GuestMemory::new(&[(memory_start_addr, 0x10000)]).unwrap();
let chain = create_descriptor_chain(
&memory,

10
devices/src/virtio/gpu/udmabuf.rs
View file

@ -162,7 +162,7 @@ mod tests {
let start_addr2 = GuestAddress(0x1100);
let start_addr3 = GuestAddress(0x2100);
let mem = GuestMemory::new(&vec![
let mem = GuestMemory::new(&[
(start_addr1, 0x1000),
(start_addr2, 0x1000),
(start_addr3, 0x1000),
@ -209,10 +209,10 @@ mod tests {
let mem = GuestMemory::new(&sg_list[..]).unwrap();
let mut udmabuf_create_list = vec![
(start_addr3, 0x1000 as usize),
(start_addr2, 0x1000 as usize),
(start_addr1, 0x1000 as usize),
(GuestAddress(0x4000), 0x1000 as usize),
(start_addr3, 0x1000),
(start_addr2, 0x1000),
(start_addr1, 0x1000),
(GuestAddress(0x4000), 0x1000),
];
let result = driver.create_udmabuf(&mem, &udmabuf_create_list[..]);

2
devices/src/virtio/input/defaults.rs
View file

@ -337,7 +337,7 @@ mod tests {
// The bitmap should contain SW_CNT=0x10+1=17 ones,
// where each one is packed into the u8 bitmap.
let mut expected_bitmap = [0 as u8; 128];
let mut expected_bitmap = [0_u8; 128];
expected_bitmap[0] = 0b11111111u8;
expected_bitmap[1] = 0b11111111u8;
expected_bitmap[2] = 0b1u8;

12
devices/src/virtio/input/event_source.rs
View file

@ -252,11 +252,11 @@ mod tests {
}
impl SourceMock {
fn new(evts: &Vec<input_event>) -> SourceMock {
fn new(evts: &[input_event]) -> SourceMock {
let mut events: Vec<u8> = vec![];
for evt in evts {
for byte in evt.as_slice() {
events.push(byte.clone());
events.push(*byte);
}
}
SourceMock { events }
@ -282,7 +282,7 @@ mod tests {
#[test]
fn empty_new() {
let mut source = EventSourceImpl::new(SourceMock::new(&vec![]), 128);
let mut source = EventSourceImpl::new(SourceMock::new(&[]), 128);
assert_eq!(
source.available_events(),
0,
@ -297,7 +297,7 @@ mod tests {
#[test]
fn empty_receive() {
let mut source = EventSourceImpl::new(SourceMock::new(&vec![]), 128);
let mut source = EventSourceImpl::new(SourceMock::new(&[]), 128);
assert_eq!(
source.receive_events::<input_event>().unwrap(),
0,
@ -358,9 +358,9 @@ mod tests {
evts.len(),
"should receive all events"
);
for idx in 0..EVENT_COUNT {
for expected_evt in evts[..EVENT_COUNT].iter() {
let evt = source.pop_available_event().unwrap();
assert_events_match(&evt, &evts[idx]);
assert_events_match(&evt, expected_evt);
}
assert_eq!(
source.available_events(),

4
devices/src/virtio/queue.rs
View file

@ -679,7 +679,7 @@ mod tests {
fn queue_event_id_guest_fast() {
let mut queue = Queue::new(QUEUE_SIZE.try_into().unwrap());
let memory_start_addr = GuestAddress(0x0);
let mem = GuestMemory::new(&vec![(memory_start_addr, GUEST_MEMORY_SIZE)]).unwrap();
let mem = GuestMemory::new(&[(memory_start_addr, GUEST_MEMORY_SIZE)]).unwrap();
setup_vq(&mut queue, &mem);
let interrupt = Interrupt::new(
@ -756,7 +756,7 @@ mod tests {
fn queue_event_id_guest_slow() {
let mut queue = Queue::new(QUEUE_SIZE.try_into().unwrap());
let memory_start_addr = GuestAddress(0x0);
let mem = GuestMemory::new(&vec![(memory_start_addr, GUEST_MEMORY_SIZE)]).unwrap();
let mem = GuestMemory::new(&[(memory_start_addr, GUEST_MEMORY_SIZE)]).unwrap();
setup_vq(&mut queue, &mem);
let interrupt = Interrupt::new(

2
devices/src/virtio/vhost/user/device/handler.rs
View file

@ -779,7 +779,7 @@ mod tests {
assert_eq!(*config, FAKE_CONFIG_DATA);
println!("set_mem_table");
let mem = GuestMemory::new(&vec![(GuestAddress(0x0), 0x10000)]).unwrap();
let mem = GuestMemory::new(&[(GuestAddress(0x0), 0x10000)]).unwrap();
vmm_handler.set_mem_table(&mem).unwrap();
for idx in 0..QUEUES_NUM {

2
devices/src/virtio/virtio_pci_common_config.rs
View file

@ -248,7 +248,7 @@ mod tests {
struct DummyDevice(u32);
const QUEUE_SIZE: u16 = 256;
const QUEUE_SIZES: &'static [u16] = &[QUEUE_SIZE];
const QUEUE_SIZES: &[u16] = &[QUEUE_SIZE];
const DUMMY_FEATURES: u64 = 0x5555_aaaa;
impl VirtioDevice for DummyDevice {
fn keep_rds(&self) -> Vec<RawDescriptor> {

1
tools/clippy
View file

@ -14,7 +14,6 @@ cd "$(dirname $0)/.."
# TODO(b/192373803): Clean up clippy error is the following crates
EXCLUDE=(
devices # 92 errors
kvm # 641 errors
kvm_sys # 613 errors
libvda # 79 errors