We had a manual parsing function that is strictly equivalent to how
serde_keyvalue would deserialize, so do the latter instead.
Also add some tests to make sure we don't regress in the future.
BUG=b:218223240
TEST=./tools/health-check
Change-Id: I5b6317774368fa4256a1944e7aec54e8fe8f210a
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3979494
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Alexandre Courbot <acourbot@chromium.org>
This will let the hypervisor crate use types and functions from the new
cros_fdt crate (it could not depend on arch, since that would cause a
circular dependency).
No functional change, just code movement.
BUG=b:253416076
TEST=cargo build
TEST=cargo build --target=aarch64-unknown-linux-gnu
Change-Id: I62d906941867c45f1b77ff1db6923d915ce2123e
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3965088
Reviewed-by: Steven Moreland <smoreland@google.com>
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Add the infrastructre for GDB 'p'/'P' packets, used by the client to get
or set individual registers.
Implement a back-end using KVM_{G,S}ET_ONE_REG on AArch64, enabling the
client to access the architecture's numerous system registers.
Add stubs for x86 to please the compiler; leave them unimplemented as,
although the ioctl is available, the architecture doesn't seem to make
use of it.
BUG=b:222222882
BUG=b:240711627
BUG=chromium:1141812
TEST=tools/dev_container ./tools/run_tests
Change-Id: I01968275e88e9d0098de40b3f78e2cd3a61b75da
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3785468
Commit-Queue: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
This search/replace updates all copyright notices to drop the
"All rights reserved", Use "ChromiumOS" instead of "Chromium OS"
and drops the trailing dots.
This fulfills the request from legal and unifies our notices.
./tools/health-check has been updated to only accept this style.
BUG=b:246579983
TEST=./tools/health-check
Change-Id: I87a80701dc651f1baf4820e5cc42469d7c5f5bf7
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3894243
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
We are going to need to start passing a new arch-dependent configuration
parameter to KvmVm::new in addition to protection_type. Since we can't
[cfg] a function argument, and to avoid churning the tests the next time
we need another argument, let's create a hypervisor::Config struct and
start passing protection_type that way.
Bug: b:234779841
Change-Id: I42ce9438b064658ebb9732e78ee5c82dac2636b6
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3892140
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Peter Collingbourne <pcc@chromium.org>
Type 11 SMBIOS OEM strings entries are commonly used to pass arbitrary
information into a VM. For example, systemd's credentials[1] system
looks for specially formatted values here.
The main goal here is to allow parameterization of a VM when we're
booting with OVMF, in which case providing parameters via the kernel
cmdline is less useful.
QEMU suports something similar, but this is a significantly simplified
approach, allowing only OEM strings instead of a wider range of DMI
table entries QEMU allows customizing.
[1]: https://systemd.io/CREDENTIALS/
BUG=b:244366989
TEST=cargo test; passed oem strings into vm and confirmed they are in
dmi tables
Change-Id: I5e106983e624c8a244b8074d6944bc0c9acfd748
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3868327
Auto-Submit: Mike Gerow <gerow@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Mike Gerow <gerow@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Allow PciDevice implementations to indicate that they do not want an IRQ
assigned at all (e.g. for modern PCIe devices that do not support INTx#
interrupts, only MSI/MSI-X) or if they do not have a preferred IRQ but
just want any available IRQ allocation.
BUG=b:245361233
TEST=tools/presubmit --all
Change-Id: Ic6c86d4ce727a7c1b91080873deee5add23f3c9f
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3877203
Reviewed-by: Dmytro Maluka <dmy@semihalf.com>
Tested-by: Dmytro Maluka <dmy@semihalf.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
For vfio-pci device, guest couldn't call this device's acpi method like
_DSM/_DSD/_PS0..., in order to let guest run it, crosvm will provide
virtual method to guest, this virtual method pass guest method call into
host and pass host return value into guest.
This commit adds a function into pci device trait, which returns the
aml code to construct virtual acpi method. Two pages mmio are used to
pass acpi parameters and return value, when guest access the first page,
vm exit happens and it is trapped into crosvm, when guest access the
second page, no vm exit happens.
Co-authored-by: Victor Ding <victording@google.com>
BUG=b:194390621
TEST=tools/presubmit
Change-Id: I71797394de61437d4d105e65488d36511c71cbd7
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3813137
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Victor Ding <victording@chromium.org>
Commit-Queue: Victor Ding <victording@chromium.org>
Rename all local variables across the codebase to be consistent with the
recently renamed cfg.protection_type (from cfg.protected_vm). This
commit is intended to make the renaming less cumbersome to review.
Note: no functional change intended.
BUG=b:243646855
TEST=build
Change-Id: I495b0854ce60cb1dc041ef43480fe11b379883c2
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3867616
Tested-by: Pierre-Clément Tosi <ptosi@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
Improve clarity and consistency between the variable and its type, given
that it represents the protected/unprotected state AND whether some
firmware needs to be used. In particular, it isn't the protected VM
itself.
Similarly, rename components.protected_vm for the same reason.
OTOH, keep cmd.protected_vm for --protected-vm as it is dedicated to
making the VM protected and follows the name of the CLI flag.
Note: no functional change intended.
BUG=b:243646855
TEST=build
Change-Id: Id91d1c83e9efa79562022dacf37f4c89e451f2b5
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3867615
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Pierre-Clément Tosi <ptosi@google.com>
Bump the versions of these crates as we're about to require support for
unavailable register values and AArch64. Do it in a separate commit to
ease future bisects.
BUG=b:222222882
BUG=chromium:1141812
TEST=tools/dev_container ./tools/run_tests
Change-Id: I0bfa3559d172faf2df6bcffdc77714830f442051
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3785466
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Auto-Submit: Pierre-Clément Tosi <ptosi@google.com>
Tested-by: Pierre-Clément Tosi <ptosi@google.com>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
Reviewed-by: Takaya Saeki <takayas@chromium.org>
Make GdbStub query the number of available hardware breakpoints from the
VM as some architectures (e.g. AArch64) might permit a flexible number.
BUG=b:222222882
BUG=chromium:1141812
TEST=tools/dev_container ./tools/run_tests
Change-Id: I9220f642fc01939305bd17461eaf50c424d998bc
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3785465
Auto-Submit: Pierre-Clément Tosi <ptosi@google.com>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
Tested-by: Pierre-Clément Tosi <ptosi@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Reviewed-by: Takaya Saeki <takayas@chromium.org>
Remove target_arch-specific #[cfg]s where the underlying code is
architecture-agnostic.
Introduce a GdbOps trait for architectures to implement.
Make use of the generic gdbstub::arch::Arch trait where relevant.
Import base::Tube unconditionally in arch/src/sys/unix.rs.
Expand crate::gdb::* in vm_control/src/lib.rs for clarity.
Keep target_arch checks in x86-specific code to exclude 32-bit builds as
those don't seem to provide GDB support.
BUG=b:222222882
BUG=chromium:1141812
TEST=tools/dev_container ./tools/run_tests
Change-Id: I3f5ceeeb9031bee222ecd388dddb815e256748e8
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3785464
Tested-by: Pierre-Clément Tosi <ptosi@google.com>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Auto-Submit: Pierre-Clément Tosi <ptosi@google.com>
Commit-Queue: Pierre-Clément Tosi <ptosi@google.com>
Virtio MMIO device needs only one MMIO region and one edge-triggered
IRQ. Both based MMIO address and IRQ number are allocated dynamically.
BUG=b:189182339
TEST=boot manatee and verify that Virtio PCI devices work properly
Change-Id: Icdd6213068ef05c5a71e23728e2a4e1d69ac454b
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3855009
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
Tested-by: Tomasz Nowicki <tnowicki@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Lookup Vitio MMIO devices and allocate resources:
- hardcoded 0x200 size single MMIO region to configure vrings
- just one shared and edge-triggered IRQ to notify guest
- per-queue ioevents to poke host
Then plug device into main bus.
BUG=b:189182339
TEST=boot manatee and verify that Virtio PCI devices work properly
Change-Id: Ic255b2c9cdf1cb43b8663d39970daf54e55c6eed
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3855008
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Tomasz Nowicki <tnowicki@google.com>
Commit-Queue: Tomasz Nowicki <tnowicki@google.com>
If a vfio-platform device has no mmio regions, it is unexpectedly
destroyed at startup (in particular, its vfio device fd is unexpectedly
closed, so its interrupt forwarding stops working, etc) since in
generate_platform_bus() arced_dev is not added to mmio_bus so there are
no more references to the device. To fix this issue, preserve references
to platform devices also in platform_devices field of RunnableLinuxVm.
BUG=b:197169350
TEST=Use vfio-platform for passthrough of a device with interrupts but
without mmio regions, e.g. touchpad on Brya, and check if it works in
the VM (i.e. its interrupts are successfully delivered).
Change-Id: I4042c5508ef6b69649c7d20962edf61b735abc03
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3820043
Commit-Queue: Dmytro Maluka <dmaluka@google.com>
Tested-by: Dmytro Maluka <dmy@semihalf.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Previously, the IRQ allocation logic could allocate different IRQ
numbers for the same pin (INTA#/INTB#/...) within the same device. This
would result in conflicting MPTable IRQ source entries where the bus,
device, and pin were the same but the IRQ number was different.
This was not apparent in practice in most cases, since almost all PCI
devices in crosvm support MSI-X, so the pin-based interrupts were not
used. However, the xhci device does not support MSI/MSI-X, so it was
affected when it was allocated one of the conflicting IRQ numbers.
Now that the generate_pci_root code in arch chooses the pin numbers
before assigning IRQs, we can fix this problem by recording previously
used pin to irq mappings within each PCI (bus, device) and reusing them
when appropriate.
BUG=b:3834424
TEST=Attach USB device to ARCVM on hatch
TEST=Start crosvm with >32 PCI devices and `pci=nomsi`
Change-Id: Ie40bcc93e71fc494bff1c5fb2d916249099be87a
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3840307
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Vineeth Pillai <vineethrp@google.com>
Reviewed-by: Noah Gold <nkgold@google.com>
Split the IRQ allocation into two PciDevice functions:
1. Ask the device if it has a preferred IRQ (used for PCI passthrough
with VFIO where we want the IRQ and pin assignment to match the
host).
2. Inform the device which IRQ it has been assigned (and providing the
interrupt event object).
This moves the decision of which pin to use into the generate_pci_root
function in arch, which means we will know the pin before assigning an
IRQ. This will be used to ensure that pin <-> IRQ number assignments are
consistent within each device in a following change.
While the API is changing, also take the opportunity to clone the IRQ
event on the caller side so that each individual device does not need to
do it.
BUG=b:3834424
TEST=Boot x86_64 Linux in crosvm
Change-Id: Ia61c108143a5bc1862e0f345c912bc0724209a72
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3840306
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Reviewed-by: Noah Gold <nkgold@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
This patch adds support for hotplug pcie switch. The user send
HotplugCommand of the new added device with the same order they
appear in device tree, and in handle_hotplug_command we add device
accordingly. During hotplug out, firstly vfio endpoint device will
send hot unplug command, we remove these endpoint device immediate-
ly, and then remove any bridge that is hotplugged into the system
but with zero child device connected to it. When all child bridges
got cleared up and pcie root port have no child devices, we send
plug out interrupt to guest kernel and probe hotplug out handling
in guest.
BUG=b:199986018
TEST=hotplug in and out pcie switch repeatedly
Change-Id: Ic3ab86d14efba4d05e204936e08bc6a582723484
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3769817
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Just like with GPE, wire up ACPI fixed event forwarding eventfd and
crosvm's ACPI fixed event emulation.
This patch allows to provide ACPIPMResource with the list of fixed
events which should work as direct physical (passthrough) events rather
than purely emulated ones.
BUG=b:228445196
TEST=compiles
Change-Id: I6f50f24fc0b9c187e48140dbafb7926ece4b9961
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3791194
Commit-Queue: Dmytro Maluka <dmaluka@google.com>
Tested-by: Dmytro Maluka <dmy@semihalf.com>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
A few new grouped imports have made it in since the tree-wide
reformatting.
BUG=None
TEST=tools/presubmit
Change-Id: I93af3c741f57c1da73d4c9e8a28be424c1ea45fe
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3818244
Auto-Submit: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Hotplug command is facing dead lock issue when it tries to acquire
the lock for pci root in the vm control thread. Dead lock could
happen when the vm control thread(Thread A namely) is handling the
hotplug command and it tries to get the lock for pci root. However,
the lock is already hold by another device in thread B, which is
actively sending an vm control to be handled by thread A and
waiting for response. However, thread A is blocked on acquiring the
lock, so dead lock happens. In order to resolve this issue, we add
a new pci root worker thread and push all work that locks pci root
to this thread.
BUG=b:199986018
TEST=tools/presubmit
Change-Id: I11552a1c9c626035d0ca01ce2835fd8b6c067a67
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3765366
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Expose HWP (HW P-State) feature to the guest if enable-hwp is present
and implement these dependencies:
- enable-hwp depends on host-cpu-topology option
- itmt depends on enable-hwp option
Group the CPU configuration entries to a new struct CpuConfigArch,
to simplify APIs in the vCPU configuration path.
BUG=b:199380745
TEST=boot Redrix manatee and verified that intel_pstate driver works
Change-Id: Icdd19190f6a7518492ff5fc54708af40288a1422
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3771065
Commit-Queue: Dmitry Torokhov <dtor@chromium.org>
Reviewed-by: Dmitry Torokhov <dtor@chromium.org>
Tested-by: Dmitry Torokhov <dtor@chromium.org>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
This requires the introduction of a BatteryConfig structure to parse,
which is probably a good idea anyway as it reserves some space to add
more battery-related options.
BUG=b:218223240
TEST=cargo test parse_battery
Change-Id: I82db7fe7ce2daeca004e734aaafa542583998561
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3784661
Tested-by: Alexandre Courbot <acourbot@chromium.org>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Alexandre Courbot <acourbot@chromium.org>
This allows SystemAllocator users to specify the properties of the
allocation they want rather than explicitly picking between
MmioType::Low and MmioType::High. That way, we can rearrange the
location of the prefetchable/cacheable MMIO region to accomodate use
cases like running 32-bit guest kernels without adjusting all allocation
call sites.
BUG=b:178000549
TEST=Boot x86_64 Linux in crosvm
Change-Id: I691393202c9841f4c687be55a9404fe619790634
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3784342
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: David Stevens <stevensd@chromium.org>
- Remove trailing ::{self} on all use statements
- Remove any resulting single-level use statements (e.g. use libc;)
- Reformat with `tools/fmt --nightly`
BUG=b:239937122
TEST=tools/dev_container tools/presubmit --all
Change-Id: I8afd1b0458ca6d08d9b41a24583f7d4148597ccb
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3798973
Auto-Submit: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Dennis Kempin <denniskempin@google.com>
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Add a new PciDevice::preferred_address() function, which allows devices
to report a PCI address where they would prefer to be allocated.
This lets the arch layer pick out the devices that need to have their
addresses reserved before allocating the remaining addresses to device
that don't care about their assigned PCI address.
For now, the returned preferred_address value is not actually used aside
from checking is_some(), but it will be used in upcoming cleanups.
BUG=b:237415650
TEST=Run x86-64 bzImage
Change-Id: Ia323274dcf801a8fe1959287bcc791ca32ce4e18
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3781441
Tested-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Ran clippy with features that are enabled downstream. Those features
will be enabled upstream in later cls when crosvm starts building.
BUG=b:213146388
TEST=presubmit
Change-Id: I67cb74127a349b572e573c350d69d1611533d961
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3793690
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Vikram Auradkar <auradkar@google.com>
Tested-by: Vikram Auradkar <auradkar@google.com>
crosvm is switching the import style to use one import per line.
While more verbose, this will greatly reduce the occurence of merge
conflicts going forward.
Note: This is using a nightly feature of rustfmt. So it's a one-off
re-format only. We are considering adding a nightly toolchain to
enable the feature permanently.
BUG=b:239937122
TEST=CQ
Change-Id: Id2dd4dbdc0adfc4f8f3dd1d09da1daafa2a39992
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3784345
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: Dennis Kempin <denniskempin@google.com>
Commit-Queue: Dennis Kempin <denniskempin@google.com>
Do not use a reference when it's not safe to call minijail.fork() multiple
times.
BUG=b:238646369
TEST=build
Change-Id: I91def471ef64ef11ba32032ccc095d5282362d62
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3779079
Reviewed-by: Noah Gold <nkgold@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Tested-by: Junichi Uekawa <uekawa@chromium.org>
As part of the split, we're re-enabling the Windows code (it was
commented out as part of earlier refactoring).
BUG=b:237597358
TEST=builds
Change-Id: I04554b109033b4616c0a6521757c4aeb70d2ea5d
Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/3767462
Tested-by: Noah Gold <nkgold@google.com>
Reviewed-by: Vikram Auradkar <auradkar@google.com>
Commit-Queue: Noah Gold <nkgold@google.com>
Highlights:
* goldfish battery never worked on Windows, but it sort of compiled
anyways downstream. This CL makes it unix only because it never worked
on Windows as a device anyway.
BUG=b:237597358
TEST=builds
Change-Id: Ia5fc3b5e5fcd243d8454646b00a6857085d018ee
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3741432
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Noah Gold <nkgold@google.com>
Reviewed-by: Vikram Auradkar <auradkar@google.com>
This shuts off some of the Windows serial code beacuse it's blocked on a
separate CL that upstreams bits of the serial device. (It doesn't work
in this repo yet anyway.)
BUG=b:237597358
TEST=builds
Change-Id: If6b223ff29d55f44bff7d006c1e0b5db3733a4ac
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3741429
Reviewed-by: Vikram Auradkar <auradkar@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Noah Gold <nkgold@google.com>
Without setting the share mode, we can't do occasionally useful things like
tail the pstore file.
BUG=b:237597358
TEST=builds + tested downstream on Windows
Change-Id: I893d0e52a671eeec5981527c1009b9d188110534
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3736759
Commit-Queue: Noah Gold <nkgold@google.com>
Reviewed-by: Vikram Auradkar <auradkar@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Windows serializes/deserializes these types to send over a Tube.
BUG=b:213146388
TEST=built on downstream windows and presubmit
Change-Id: Ib9ca4cbb2758a997788c4bab46d573a532e8e3d4
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3735635
Commit-Queue: Vikram Auradkar <auradkar@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Rather than having a single vcpu_init instance that is used for all
VCPUs, make vcpu_init into a Vec so it can store different initial state
for each VCPU. This allows us to set up e.g. bootstrap processor state
differently than other processors, and it also means that the VcpuInit
struct doesn't need to be Copy.
BUG=b:237095693
TEST=Boot Linux with >1 CPU
Change-Id: I0ebfdc2dbd84d0817e3f75c2c852e4320b9e77c5
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3723798
Reviewed-by: Alexandre Courbot <acourbot@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
There have been two evolutions of providing the TSC cpuid leaf
(aka 0x15) to the guest.
a) For CrosVM on Windows, we have been providing the leaf
unconditionally. Furthermore, we've not been using the
exact host leaf; instead, we calibrate the TSC frequency
and provide that value in the leaf. This was done because
the actual cpuid leaf values are not as accurate as
we needed them to be to drive a guest clocksource.
b) In CrosVM mainline, 4080aaf9b3
introduced the flag enable_pnp / enable_pnp_data, and
provides the exact host 0x15 leaf to the guest if the
flag is enabled.
This CL adds a new hypervisor capability (CalibratedTscLeafRequired) to control
whether or not the calibrated TSC leaf should be used, in addition to a new CLI
option to force it on hypervisors where it isn't enabled by default. The new
option is `--force_calibrated_tsc_leaf`.
BUG=b:213152505
TEST=builds upstream, battletested downstream on WHPX.
Change-Id: I611422808a9e10578c0ddcbd211ae902f937685f
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3698993
Commit-Queue: Noah Gold <nkgold@google.com>
Reviewed-by: Junichi Uekawa <uekawa@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
When pcie switch get removed from the system, we need to remove
their pci buses. This patch adds a new bool field in PciBus
structure to mark it as a hotplug bus and add support to remove
a pci bus from a pci bus tree. Also some other helper functions
is added for hotplug out usage.
BUG=b:199986018
TEST=./tools/presubmit
Change-Id: I71064127345424bf050d993f60f9d766a299de8b
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3709793
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
This is a reland of commit 7110d673f2
Replace --no-legacy flag, which implied the removal of both i8042 and
rtc devices, with separate --no-i8042 and --no-rtc flags. The old
flag is still supported and implies the other two.
Because the original landing of this flag didn't protect it as an x86
specific option, this change just leaves that alone. But the new flags
are added as x86-only, because they are very x86 specific.
BUG=b:223443221
TEST=crosvm run --bios u-boot.rom --disk kernel
TEST=boot volteer-manatee
Change-Id: I57f9328483f24da29db663e261b3ccc2a97c3239
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3715083
Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
This reverts commit 7110d673f2.
Reason for revert: Needs to preserve --no-legacy flag for a while though deprecated
Original change's description:
> crosvm: split up --no-legacy flag
>
> Replace --no-legacy flag, which implied the removal of both i8042 and
> rtc devices, with separate --no-i8042 and --no-rtc flags. The old
> flag is still supported and implies the other two.
>
> Because the original landing of this flag didn't protect it as an x86
> specific option, this change just leaves that alone. But the new flags
> are added as x86-only, because they are very x86 specific.
>
> BUG=b:223443221
> TEST=crosvm run --bios u-boot.rom --disk kernel
>
> Change-Id: I4bbea2d0a38fdd3a5d69d12ca79fa360f0460358
> Signed-off-by: Alistair Delva <adelva@google.com>
> Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3510982
> Reviewed-by: Daniel Verkamp <dverkamp@chromium.org>
> Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
> Tested-by: kokoro <noreply+kokoro@google.com>
Bug: b:223443221
Change-Id: I022cff96f4508713c15973ee37a57e7fdc8c14e3
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3715073
Bot-Commit: Rubber Stamper <rubber-stamper@appspot.gserviceaccount.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Junichi Uekawa <uekawa@chromium.org>
Reviewed-by: Keiichi Watanabe <keiichiw@chromium.org>
This will be used to pass the initial register values for each vcpu.
Each architecture can define its own variant of the initial vcpu state.
BUG=b:234155022
TEST=tools/presubmit --all
Change-Id: I696a5ecda202c1ff0681f0b89b89b9eec11e27e7
Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3673615
Reviewed-by: Anton Romanov <romanton@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>
