Xiong Zhang 1b27aef288 x86_64: Add parameter to speicify pcie cfg mmio base and size ... Previous pcie cfg mmio is predefined as constand to avoid conflict with pci mmio, this has two issues: a. The size of pcie cfg mmio is limited to 64MB, so the max pci bus number is 64. This isn't ennough for vfio-pci device, as such device's bus number is same as host bus number, it may be above 64. b. In manatee, CrOS may be required to have the same pcie cfg mmio base and size as host. So this commit add a parameter and let user could specify pcie cfg mmio base and size. Then the guest memory layout will be adjusted to avoid conflict between guest ram and pci low mmio. BUG=b:197877871 TEST=run crosvm with --pcie-ecam=xxxx,xxxx, check vm's memory layout and pcie ECAM function Change-Id: I22cf7e2b3f01ab3f48dff9f5246cb1c24faa9703 Reviewed-on: https://chromium-review.googlesource.com/c/chromiumos/platform/crosvm/+/3305948 Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Tested-by: kokoro <noreply+kokoro@google.com> Reviewed-by: Junichi Uekawa <uekawa@chromium.org> Commit-Queue: Daniel Verkamp <dverkamp@chromium.org>		2022-05-13 00:19:52 +00:00
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src	x86_64: Add parameter to speicify pcie cfg mmio base and size	2022-05-13 00:19:52 +00:00
Cargo.toml