David Stevens 7eb7a4ede2 devices: Add read-only memslots for pci config space ... Take advantage of the fact that the PCI spec does not define any configuration register attributes where reads have side-effects to back the PCI configuration space with read-only memslots. Support in crosvm needs to be done at the PciDevice implementation level, to support situations where device-internal events lead to modifications of the PCI configuration space memory. After applying other optimizations, this reduces the average time needed to exit s2idle from 120ms->40ms/200ms->100ms on delbin/dood, and helps to reduce variance as well. BUG=b:301865576 TEST=boot ARCVM with --break-linux-pci-config-io on x86 and ARM TEST=manually verify virtio-net hotplug w/--break-linux-pci-config-io Change-Id: Idcbddbed0235bfbd44cca70a46c1d526928621e8 Reviewed-on: https://chromium-review.googlesource.com/c/crosvm/crosvm/+/4891756 Reviewed-by: Daniel Verkamp <dverkamp@chromium.org> Reviewed-by: Noah Gold <nkgold@google.com> Commit-Queue: David Stevens <stevensd@chromium.org>		2023-11-01 03:37:49 +00:00
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src	devices: Add read-only memslots for pci config space	2023-11-01 03:37:49 +00:00
tests	devices: Add read-only memslots for pci config space	2023-11-01 03:37:49 +00:00
Cargo.toml	Replace #[cfg(unix)] with #[cfg(any(target_os = "android", target_os = "linux"))]	2023-10-11 00:43:29 +00:00