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https://github.com/facebookexperimental/reverie.git
synced 2025-01-23 05:06:23 +00:00
Remove old and unused llvm_asm!() assembly blocks
Summary: This was from the *before times* when `core::arch::asm` wasn't yet stable. `llvm_asm!()` has been removed from recent versions of rustc, so this stuff won't even compile anymore. Note that this also removes a rather large block of `llvm_asm` (`check_for_xen_pmi_bug`) that hasn't yet been migrated over to the new asm syntax. This seems like a lot of work for little benefit, so I'm just deleting it for now. Differential Revision: D40957341 fbshipit-source-id: 2b9bf97e93eaa9462295b9060907530dd797e288
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5 changed files with 0 additions and 227 deletions
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@ -31,7 +31,6 @@
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#![feature(async_closure)]
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#![feature(internal_output_capture)]
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#![feature(never_type)]
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#![cfg_attr(feature = "llvm_asm", feature(llvm_asm))]
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#![feature(map_first_last)]
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#![feature(bench_black_box)]
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@ -571,7 +571,6 @@ macro_rules! ret_without_perf {
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/// Perform exactly `count+1` conditional branch instructions. Useful for
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/// testing timer-related code.
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#[cfg(target_arch = "x86_64")]
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#[cfg(not(feature = "llvm_asm"))]
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#[inline(never)]
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pub fn do_branches(mut count: u64) {
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// Anything but assembly is unreliable between debug and release
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@ -605,29 +604,6 @@ pub fn do_branches(mut count: u64) {
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assert_eq!(count, 0);
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}
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/// Perform exactly `count+1` conditional branch instructions. Useful for
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/// testing timer-related code.
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#[cfg(target_arch = "x86_64")]
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#[cfg(feature = "llvm_asm")]
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#[inline(never)]
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pub fn do_branches(count: u64) {
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// Anything but assembly is unreliable between debug and release
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#[allow(deprecated)]
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unsafe {
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// Loop until carry flag is set, indicating underflow
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llvm_asm!("
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mov $0, %rax
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perf_test_branch_loop:
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subq $$1, %rax
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jnc perf_test_branch_loop
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"
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: /* no output */
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: "r"(count)
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: "cc", "rax"
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);
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}
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}
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// NOTE: aarch64 doesn't work with
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// `Event::Hardware(HardwareEvent::BranchInstructions)`, so these tests are
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// disabled for that architecture. Most likely, we need to use `Event::Raw`
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@ -72,10 +72,6 @@ pub(crate) enum PmuValidationError {
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#[cfg(target_arch = "x86_64")]
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#[error("Intel Kvm-In-Txcp bug found")]
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IntelKvmInTxcpBugDetected,
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#[cfg(feature = "llvm_asm")]
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#[error("Overcount triggered by PMU interrupts detected due to Xen PMU virtualization bug")]
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IntelXenPmiBugDetected,
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}
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fn init_perf_event_attr(
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@ -377,8 +373,6 @@ fn check_for_arch_bugs(_precise_ip: bool) -> Result<(), PmuValidationError> {
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"AuthenticAMD" if is_amd_zen(feature_info) => check_for_zen_speclockmap(),
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"GenuineIntel" => {
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check_for_kvm_in_txcp_bug()?;
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#[cfg(feature = "llvm_asm")]
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check_for_xen_pmi_bug(_precise_ip)?;
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Ok(())
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}
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s => panic!("Unknown CPU vendor: {}", s),
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@ -411,7 +405,6 @@ fn check_for_zen_speclockmap() -> Result<(), PmuValidationError> {
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let count = read_counter(&fd)?;
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// A lock add is known to increase the perf counter we're looking at.
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#[cfg(not(feature = "llvm_asm"))]
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unsafe {
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let mut _prev: *mut usize;
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core::arch::asm!(
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@ -422,17 +415,6 @@ fn check_for_zen_speclockmap() -> Result<(), PmuValidationError> {
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)
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}
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#[cfg(feature = "llvm_asm")]
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#[allow(deprecated)]
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unsafe {
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let _prev: usize;
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llvm_asm!("lock; xaddq $2, $1"
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: "=r" (_prev), "+*m" (&val)
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: "0" (to_add)
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: "memory"
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: "volatile");
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}
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if read_counter(&fd)? != count {
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Err(PmuValidationError::AmdSpecLockMapShouldBeDisabled)
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} else {
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@ -466,154 +448,6 @@ fn check_for_kvm_in_txcp_bug() -> Result<(), PmuValidationError> {
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}
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}
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// FIXME: Convert this big block of llvm_asm over to the new asm syntax.
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#[cfg(feature = "llvm_asm")]
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fn check_for_xen_pmi_bug(precise_ip: bool) -> Result<(), PmuValidationError> {
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#[allow(unused_assignments)]
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let mut count: i32 = -1;
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let mut attr = ticks_attr(precise_ip);
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attr.__bindgen_anon_1.sample_period = NUM_BRANCHES - 1;
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let fd = start_counter(0, -1, &mut attr, None)?;
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// The original C++ uses `rand()` to make sure this isn't optimized around.
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// We will use black_box to do the same thing without introducing variability
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fn make_accumulator_seed() -> u32 {
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20764791
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}
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let mut accumulator = core::hint::black_box(make_accumulator_seed());
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let mut expected_accumulator = accumulator;
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// reproduce the assembly here to calculate what the final accumulator value should be
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for _ in 0..(NUM_BRANCHES - 2) {
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let temp_exp_accumulator = expected_accumulator.overflowing_shl(3).0;
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expected_accumulator = temp_exp_accumulator
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.overflowing_sub(expected_accumulator)
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.0
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.overflowing_add(2)
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.0
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& 0xffffff;
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}
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let raw_fd = fd.0;
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#[allow(deprecated)]
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unsafe {
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// The following asm block does this:
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// ```
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// let ret = syscall!(sys_ioctl, raw_fd, _PERF_EVENT_IOC_ENABLE, 0);
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// if ret >= -4095 as u64 { return; }
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// let ret = syscall!(SYS_ioctl, raw_fd, _PERF_EVENT_IOC_RESET, 0);
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// // From this point on, all conditional branches count!
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// if ret >= -4095 as u64 { return; }
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// // Reset the counter period to the desired value.
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// let ret = syscall!(SYS_ioctl, raw_fd, _PERF_EVENT_IOC_PERIOD, attr.sample_period);
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// if ret >= -4095 as u64 { return; }
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// let mut iterations = NUM_BRANCHES - 2;
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// loop {
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// iterations -= 1;
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// accumulator *= 7;
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// accumulator += 2;
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// accumulator &= 0xffffff;
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// if iterations == 0 {
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// break;
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// }
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// }
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//
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// let ret = syscall!(SYS_ioctl, raw_fd, _PERF_EVENT_IOC_DISABLE, 0);
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// if ret >= -4095 as u64 { return; }
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// count = 0;
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// ```
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llvm_asm!(
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"
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mov $2, %rax;
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mov $9, %edi;
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xor %rdx, %rdx;
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mov $4, %rsi;
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syscall;
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cmp $$-4095, %rax;
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jae 2f;
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mov $2, %rax;
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mov $6, %rsi;
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syscall;
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/* From this point on all conditional branches count! */
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cmp $$-4095, %rax;
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jae 2f;
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/* Reset the counter period to the desired value. */
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mov $2, %rax;
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mov $5, %rsi;
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mov $8, %rdx;
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syscall;
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cmp $$-4095, %rax;
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jae 2f;
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mov $7, %rax;
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1: dec %rax;
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/* Multiply by 7. */
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mov $0, %edx;
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shl $$3, $0;
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sub %edx, $0;
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/* Add 2. */
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add $$2, $0;
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/* Mask off bits. */
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and $$0xffffff, $0;
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/* And loop. */
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test %rax, %rax;
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jnz 1b;
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mov $3, %rsi;
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mov $2, %rax;
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xor %rdx, %rdx;
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/* We didn't touch rdi. */
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syscall;
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cmp $$-4095, %rax;
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jae 2f;
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movl $$0, $1;
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2: nop;"
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:
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"+r"(accumulator),
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"=r"(count)
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:
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"i"(libc::SYS_ioctl)
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,
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"i"(perf::perf_event_ioctls_DISABLE),
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"i"(perf::perf_event_ioctls_ENABLE),
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"i"(perf::perf_event_ioctls_PERIOD),
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"i"(perf::perf_event_ioctls_RESET),
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// The check for the failure of some of our ioctls is in
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// the measured region, so account for that when looping.
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"i"(NUM_BRANCHES - 2),
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"rm"(&attr.__bindgen_anon_1.sample_period), "rm"(raw_fd)
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:
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"rax", "rdx", "rdi", "rsi"
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/* `syscall` clobbers rcx and r11. */
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,
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"rcx", "r11"
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: "volatile"
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);
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}
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// If things worked above, `count` should have been set to 0.
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if count == 0 {
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count = read_counter(&fd)? as i32;
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}
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// Use 'accumulator' so it can't be optimized out.
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if accumulator != expected_accumulator {
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return Err(PmuValidationError::UnexpectedTestingError(format!(
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"Unexpected accumulator value in xen pmi bug check. Expected {}, but was {}",
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expected_accumulator, accumulator
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)));
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}
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let has_xen_pmi_bug = count as u64 > NUM_BRANCHES || count == -1;
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if has_xen_pmi_bug {
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Err(PmuValidationError::IntelXenPmiBugDetected)
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} else {
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Ok(())
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}
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}
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#[cfg(test)]
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mod test {
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use super::*;
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@ -6,8 +6,6 @@
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* LICENSE file in the root directory of this source tree.
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*/
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#![cfg_attr(feature = "llvm_asm", feature(llvm_asm))]
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//! Basic tests that don't fall into some other category.
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#[allow(unused_imports)]
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@ -6,7 +6,6 @@
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* LICENSE file in the root directory of this source tree.
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*/
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#![cfg_attr(feature = "llvm_asm", feature(llvm_asm))]
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// FIXME: This test does some very x86_64-specific things.
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#![cfg(target_arch = "x86_64")]
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@ -68,7 +67,6 @@ mod tests {
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use super::*;
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#[cfg(target_arch = "x86_64")]
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#[cfg(not(feature = "llvm_asm"))]
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#[allow(unused_mut)]
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unsafe fn open_syscall_sanity_check() -> i32 {
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let path = b"/dev/null\0".as_ptr() as usize;
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ret as i32
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}
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#[cfg(target_arch = "x86_64")]
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#[cfg(feature = "llvm_asm")]
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#[allow(unused_mut)]
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#[allow(deprecated)]
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unsafe fn open_syscall_sanity_check() -> i32 {
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let mut ret;
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let path = b"/dev/null\0";
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llvm_asm!(r#"movq %rdi, %r8
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movq $$0x8000, %rsi # O_LARGEFILE
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movq $$0x1a4, %rdx # 0644
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mov $$2, %eax
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syscall
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cmp $$0xfffffffffffff001,%rax
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jae 1f
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cmp %rdi, %r8
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jne 1f
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cmp $$0x8000, %rsi
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jne 1f
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cmp $$0x1a4, %rdx
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jne 1f
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jmp 2f
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1:mov $$1, %rdi
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mov $$231, %rax # call exit_group(1)
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syscall
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2:
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"#
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:"={rax}"(ret)
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:"{rdi}"(path.as_ptr() as u64)
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:"rcx", "r11", "memory");
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ret
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}
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#[cfg(not(target_arch = "x86_64"))]
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unsafe fn open_syscall_sanity_check() -> i32 {
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unimplemented!()
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