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https://github.com/facebookexperimental/reverie.git
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Add aarch64 registers to gdbstub
Reviewed By: VladimirMakaev Differential Revision: D40701836 fbshipit-source-id: 42c47be166d892bc208b68938d4c41746857b38c
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3 changed files with 207 additions and 1 deletions
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@ -35,7 +35,6 @@ pub use inferior::InferiorThreadId;
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pub use inferior::ResumeInferior;
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pub use inferior::StoppedInferior;
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pub use regs::CoreRegs;
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pub use regs::ExtraRegs;
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pub use request::GdbRequest;
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pub use server::GdbServer;
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pub use session::Session;
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203
reverie-ptrace/src/gdbstub/regs/aarch64.rs
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203
reverie-ptrace/src/gdbstub/regs/aarch64.rs
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@ -0,0 +1,203 @@
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/*
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* Copyright (c) Meta Platforms, Inc. and affiliates.
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*
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* All rights reserved.
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*
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* This source code is licensed under the BSD-style license found in the
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* LICENSE file in the root directory of this source tree.
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*/
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use core::mem::MaybeUninit;
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use serde::Deserialize;
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use serde::Serialize;
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use super::super::response::*;
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/// GDB-specific definition of the general purpose registers. This is only
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/// *slightly* different from `libc::user_regs_struct`.
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#[derive(Debug, Default, PartialEq, Clone, Deserialize, Serialize)]
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pub struct GeneralRegs {
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// General purpose registers
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pub x0: u64,
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pub x1: u64,
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pub x2: u64,
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pub x3: u64,
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pub x4: u64,
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pub x5: u64,
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pub x6: u64,
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pub x7: u64,
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pub x8: u64,
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pub x9: u64,
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pub x10: u64,
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pub x11: u64,
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pub x12: u64,
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pub x13: u64,
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pub x14: u64,
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pub x15: u64,
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pub x16: u64,
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pub x17: u64,
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pub x18: u64,
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pub x19: u64,
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pub x20: u64,
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pub x21: u64,
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pub x22: u64,
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pub x23: u64,
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pub x24: u64,
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pub x25: u64,
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pub x26: u64,
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pub x27: u64,
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pub x28: u64,
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pub x29: u64,
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pub x30: u64,
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pub sp: u64,
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pub pc: u64,
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pub cpsr_flags: u32,
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}
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/// GDB-specific definition of the FPU registers.
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#[derive(Debug, Default, PartialEq, Clone, Deserialize, Serialize)]
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pub struct FpRegs {
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pub vregs: [u128; 32],
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pub fpsr: u32,
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pub fpcr: u32,
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}
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/// GDB-specific definition of the registers. This is only *slightly* different
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/// from `libc::user_regs_struct`.
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#[derive(Debug, Default, PartialEq, Clone, Deserialize, Serialize)]
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pub struct CoreRegs {
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// General purpose registers
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pub gpr: GeneralRegs,
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// FPU registers
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pub fpr: FpRegs,
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}
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impl From<libc::user_regs_struct> for GeneralRegs {
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fn from(regs: libc::user_regs_struct) -> Self {
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Self {
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x0: regs.regs[0],
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x1: regs.regs[1],
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x2: regs.regs[2],
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x3: regs.regs[3],
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x4: regs.regs[4],
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x5: regs.regs[5],
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x6: regs.regs[6],
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x7: regs.regs[7],
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x8: regs.regs[8],
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x9: regs.regs[9],
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x10: regs.regs[10],
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x11: regs.regs[11],
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x12: regs.regs[12],
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x13: regs.regs[13],
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x14: regs.regs[14],
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x15: regs.regs[15],
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x16: regs.regs[16],
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x17: regs.regs[17],
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x18: regs.regs[18],
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x19: regs.regs[19],
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x20: regs.regs[20],
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x21: regs.regs[21],
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x22: regs.regs[22],
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x23: regs.regs[23],
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x24: regs.regs[24],
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x25: regs.regs[25],
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x26: regs.regs[26],
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x27: regs.regs[27],
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x28: regs.regs[28],
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x29: regs.regs[29],
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x30: regs.regs[30],
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sp: regs.sp,
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pc: regs.pc,
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cpsr_flags: regs.pstate as u32,
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}
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}
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}
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impl From<GeneralRegs> for libc::user_regs_struct {
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fn from(regs: GeneralRegs) -> Self {
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let mut out = unsafe { MaybeUninit::<Self>::zeroed().assume_init() };
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out.regs[0] = regs.x0;
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out.regs[1] = regs.x1;
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out.regs[2] = regs.x2;
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out.regs[3] = regs.x3;
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out.regs[4] = regs.x4;
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out.regs[5] = regs.x5;
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out.regs[6] = regs.x6;
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out.regs[7] = regs.x7;
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out.regs[8] = regs.x8;
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out.regs[9] = regs.x9;
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out.regs[10] = regs.x10;
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out.regs[11] = regs.x11;
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out.regs[12] = regs.x12;
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out.regs[13] = regs.x13;
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out.regs[14] = regs.x14;
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out.regs[15] = regs.x15;
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out.regs[16] = regs.x16;
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out.regs[17] = regs.x17;
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out.regs[18] = regs.x18;
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out.regs[19] = regs.x19;
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out.regs[20] = regs.x20;
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out.regs[21] = regs.x21;
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out.regs[22] = regs.x22;
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out.regs[23] = regs.x23;
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out.regs[24] = regs.x24;
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out.regs[25] = regs.x25;
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out.regs[26] = regs.x26;
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out.regs[27] = regs.x27;
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out.regs[28] = regs.x28;
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out.regs[29] = regs.x29;
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out.regs[30] = regs.x30;
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out.sp = regs.sp;
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out.pc = regs.pc;
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out.pstate = regs.cpsr_flags as u64;
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out
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}
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}
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impl From<safeptrace::FpRegs> for FpRegs {
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fn from(regs: safeptrace::FpRegs) -> Self {
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Self {
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vregs: regs.vregs,
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fpsr: regs.fpsr,
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fpcr: regs.fpcr,
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}
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}
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}
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impl From<FpRegs> for safeptrace::FpRegs {
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fn from(regs: FpRegs) -> Self {
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let mut out = unsafe { MaybeUninit::<Self>::zeroed().assume_init() };
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out.vregs = regs.vregs;
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out.fpsr = regs.fpsr;
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out.fpcr = regs.fpcr;
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out
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}
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}
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impl CoreRegs {
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pub fn from_parts(gpr: libc::user_regs_struct, fpr: safeptrace::FpRegs) -> Self {
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Self {
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gpr: gpr.into(),
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fpr: fpr.into(),
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}
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}
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pub fn into_parts(self) -> (libc::user_regs_struct, safeptrace::FpRegs) {
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(self.gpr.into(), self.fpr.into())
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}
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}
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impl WriteResponse for ResponseAsHex<CoreRegs> {
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fn write_response(&self, f: &mut ResponseWriter) {
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let encoded: Vec<u8> = bincode::serialize(&self.0).unwrap();
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ResponseAsHex(encoded.as_slice()).write_response(f)
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}
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}
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impl WriteResponse for ResponseAsBinary<CoreRegs> {
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fn write_response(&self, f: &mut ResponseWriter) {
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let encoded: Vec<u8> = bincode::serialize(&self.0).unwrap();
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ResponseAsBinary(encoded.as_slice()).write_response(f)
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}
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}
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@ -7,9 +7,13 @@
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* LICENSE file in the root directory of this source tree.
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*/
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#[cfg(target_arch = "aarch64")]
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mod aarch64;
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#[cfg(target_arch = "x86_64")]
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mod x86_64;
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#[cfg(target_arch = "aarch64")]
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pub use aarch64::CoreRegs;
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#[cfg(target_arch = "x86_64")]
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pub use x86_64::CoreRegs;
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#[cfg(target_arch = "x86_64")]
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