Rename Amd64CoreRegs -> CoreRegs

Summary: This is a more architecture-independent name.

Reviewed By: VladimirMakaev

Differential Revision: D40701833

fbshipit-source-id: 66b77c6f62886ecd776a3efbc0b71248f875914e

reverie-ptrace/src/gdbstub/mod.rs

@@ -34,8 +34,8 @@ pub use inferior::Inferior;
 pub use inferior::InferiorThreadId;
 pub use inferior::ResumeInferior;
 pub use inferior::StoppedInferior;
-pub use regs::Amd64CoreRegs;
-pub use regs::Amd64ExtraRegs;
+pub use regs::CoreRegs;
+pub use regs::ExtraRegs;
 pub use request::GdbRequest;
 pub use server::GdbServer;
 pub use session::Session;

reverie-ptrace/src/gdbstub/regs/mod.rs

@@ -11,6 +11,6 @@
 mod x86_64;
 
 #[cfg(target_arch = "x86_64")]
-pub use x86_64::Amd64CoreRegs;
+pub use x86_64::CoreRegs;
 #[cfg(target_arch = "x86_64")]
-pub use x86_64::Amd64ExtraRegs;
+pub use x86_64::ExtraRegs;

reverie-ptrace/src/gdbstub/regs/x86_64.rs

@@ -49,7 +49,7 @@ pub struct X87Regs {
 /// AMD64 core/sse regs, see gdb/64bit-{core,sse}-linux.xml.
 /// This is the same as: 64bit-core+64bit-sse+64bit-linux.
 #[derive(Debug, Default, PartialEq, Clone, Deserialize, Serialize)]
-pub struct Amd64CoreRegs {
+pub struct CoreRegs {
     /// general purpose regsiters
     /// rax/rbx/rcx/rdx/rsi/rdi/rbp/rsp/r8..r15
     pub regs: [u64; 16],
@@ -74,7 +74,7 @@ pub struct Amd64CoreRegs {
 
 /// amd64 avx regs
 #[derive(Debug, Default, PartialEq, Clone, Deserialize, Serialize)]
-pub struct Amd64ExtraRegs {
+pub struct ExtraRegs {
     /// avx registers
     pub ymm: [u128; 32],
     /// avx512 registers
@@ -209,8 +209,8 @@ impl From<Xmm> for [u32; 64] {
     }
 }
 
-impl Amd64CoreRegs {
-    /// create `Amd64CoreRegs` from user and fp regs.
+impl CoreRegs {
+    /// create `CoreRegs` from user and fp regs.
     pub fn from_parts(regs: libc::user_regs_struct, i387: libc::user_fpregs_struct) -> Self {
         Self {
             regs: [
@@ -297,14 +297,14 @@ impl Amd64CoreRegs {
     }
 }
 
-impl WriteResponse for ResponseAsHex<Amd64CoreRegs> {
+impl WriteResponse for ResponseAsHex<CoreRegs> {
     fn write_response(&self, f: &mut ResponseWriter) {
         let encoded: Vec<u8> = bincode::serialize(&self.0).unwrap();
         ResponseAsHex(encoded.as_slice()).write_response(f)
     }
 }
 
-impl WriteResponse for ResponseAsBinary<Amd64CoreRegs> {
+impl WriteResponse for ResponseAsBinary<CoreRegs> {
     fn write_response(&self, f: &mut ResponseWriter) {
         let encoded: Vec<u8> = bincode::serialize(&self.0).unwrap();
         ResponseAsBinary(encoded.as_slice()).write_response(f)
@@ -361,15 +361,15 @@ mod test {
     #[test]
     fn amd64_core_regs_sanity() {
         const EXPECTED_SIZE: usize = 16 * 8 + 8 + 4 + 4 * 6 + 10 * 8 + 8 * 4 + 16 * 16 + 4 + 8 * 3; // 560.
-        assert_eq!(mem::size_of::<Amd64CoreRegs>(), EXPECTED_SIZE);
-        let core_regs: Amd64CoreRegs = Default::default();
+        assert_eq!(mem::size_of::<CoreRegs>(), EXPECTED_SIZE);
+        let core_regs: CoreRegs = Default::default();
         let encoded: Vec<u8> = bincode::serialize(&core_regs).unwrap();
         assert_eq!(encoded.len(), EXPECTED_SIZE);
     }
 
     #[test]
     fn amd64_core_regs_serde() {
-        let core_regs: Amd64CoreRegs = Amd64CoreRegs {
+        let core_regs: CoreRegs = CoreRegs {
             regs: [
                 0x1c,
                 0,

reverie-ptrace/src/gdbstub/request.rs

@@ -9,8 +9,8 @@
 use safeptrace::Error as TraceError;
 use tokio::sync::oneshot;
 
-use super::Amd64CoreRegs;
 use super::Breakpoint;
+use super::CoreRegs;
 
 /// gdb request send to reverie.
 #[derive(Debug)]
@@ -27,7 +27,7 @@ pub enum GdbRequest {
     /// Write inferior memory
     WriteInferiorMemory(u64, usize, Vec<u8>, oneshot::Sender<Result<(), TraceError>>),
     /// Read registers
-    ReadRegisters(oneshot::Sender<Result<Amd64CoreRegs, TraceError>>),
+    ReadRegisters(oneshot::Sender<Result<CoreRegs, TraceError>>),
     /// Write registers
-    WriteRegisters(Amd64CoreRegs, oneshot::Sender<Result<(), TraceError>>),
+    WriteRegisters(CoreRegs, oneshot::Sender<Result<(), TraceError>>),
 }

reverie-ptrace/src/gdbstub/session.rs

@@ -33,7 +33,7 @@ use tokio::sync::MutexGuard;
 
 use super::commands;
 use super::commands::*;
-use super::regs::Amd64CoreRegs;
+use super::regs::CoreRegs;
 use super::response::*;
 use super::Breakpoint;
 use super::BreakpointType;
@@ -811,7 +811,7 @@ impl Session {
         .await
     }
 
-    async fn read_registers(&self) -> Result<Amd64CoreRegs, Error> {
+    async fn read_registers(&self) -> Result<CoreRegs, Error> {
         self.with_current_inferior(async move |inferior| {
             let request_tx = inferior
                 .request_tx
@@ -837,7 +837,7 @@ impl Session {
                 .as_ref()
                 .ok_or(Error::SessionNotStarted)?;
             let (reply_tx, reply_rx) = oneshot::channel();
-            let core_regs: Amd64CoreRegs =
+            let core_regs: CoreRegs =
                 bincode::deserialize(regs).map_err(|_| CommandParseError::MalformedRegisters)?;
             let request = GdbRequest::WriteRegisters(core_regs, reply_tx);
             let _ = request_tx

reverie-ptrace/src/task.rs

@@ -71,8 +71,8 @@ use super::regs::RegAccess;
 use crate::children;
 use crate::cp;
 use crate::error::Error;
-use crate::gdbstub::Amd64CoreRegs;
 use crate::gdbstub::BreakpointType;
+use crate::gdbstub::CoreRegs;
 use crate::gdbstub::GdbRequest;
 use crate::gdbstub::GdbServer;
 use crate::gdbstub::ResumeAction;
@@ -2019,15 +2019,15 @@ impl<L: Tool + 'static> TracedTask<L> {
         Ok(())
     }
 
-    fn read_registers(&self) -> Result<Amd64CoreRegs, TraceError> {
+    fn read_registers(&self) -> Result<CoreRegs, TraceError> {
         let task = self.assume_stopped();
         let regs = task.getregs()?;
         let fpregs = task.getfpregs()?;
-        let core_regs = Amd64CoreRegs::from_parts(regs, fpregs);
+        let core_regs = CoreRegs::from_parts(regs, fpregs);
         Ok(core_regs)
     }
 
-    fn write_registers(&self, core_regs: Amd64CoreRegs) -> Result<(), TraceError> {
+    fn write_registers(&self, core_regs: CoreRegs) -> Result<(), TraceError> {
         let task = self.assume_stopped();
         let (regs, fpregs) = core_regs.into_parts();
         task.setregs(regs)?;